diff options
Diffstat (limited to 'sim-urshr-16b-2opimm-trace-arm64.h')
| -rw-r--r-- | sim-urshr-16b-2opimm-trace-arm64.h | 193 |
1 files changed, 193 insertions, 0 deletions
diff --git a/sim-urshr-16b-2opimm-trace-arm64.h b/sim-urshr-16b-2opimm-trace-arm64.h new file mode 100644 index 0000000..a2e8e06 --- /dev/null +++ b/sim-urshr-16b-2opimm-trace-arm64.h @@ -0,0 +1,193 @@ +// Copyright 2015, VIXL authors +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// * Neither the name of ARM Limited nor the names of its contributors may be +// used to endorse or promote products derived from this software without +// specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND +// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +// --------------------------------------------------------------------- +// This file is auto generated using tools/generate_simulator_traces.py. +// +// PLEASE DO NOT EDIT. +// --------------------------------------------------------------------- + +#ifndef VIXL_SIM_URSHR_16B_2OPIMM_TRACE_AARCH64_H_ +#define VIXL_SIM_URSHR_16B_2OPIMM_TRACE_AARCH64_H_ + +const uint8_t kExpected_NEON_urshr_16B_2OPIMM[] = { + 0x1a, 0x2b, 0x3f, 0x3f, 0x40, 0x40, 0x41, 0x41, 0x42, 0x55, 0x66, 0x7c, 0x7f, 0x7f, 0x80, 0x00, + 0x0d, 0x15, 0x1f, 0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x2b, 0x33, 0x3e, 0x3f, 0x40, 0x40, 0x00, + 0x06, 0x0b, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x15, 0x1a, 0x1f, 0x20, 0x20, 0x20, 0x00, + 0x03, 0x05, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x0b, 0x0d, 0x10, 0x10, 0x10, 0x10, 0x00, + 0x02, 0x03, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x05, 0x06, 0x08, 0x08, 0x08, 0x08, 0x00, + 0x01, 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04, 0x04, 0x04, 0x00, + 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, + 0x2b, 0x3f, 0x3f, 0x40, 0x40, 0x41, 0x41, 0x42, 0x55, 0x66, 0x7c, 0x7f, 0x7f, 0x80, 0x00, 0x01, + 0x15, 0x1f, 0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x2b, 0x33, 0x3e, 0x3f, 0x40, 0x40, 0x00, 0x00, + 0x0b, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x15, 0x1a, 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