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Diffstat (limited to 'sim-shll2-4s-2opimm-trace-arm64.h')
| -rw-r--r-- | sim-shll2-4s-2opimm-trace-arm64.h | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/sim-shll2-4s-2opimm-trace-arm64.h b/sim-shll2-4s-2opimm-trace-arm64.h new file mode 100644 index 0000000..86181a1 --- /dev/null +++ b/sim-shll2-4s-2opimm-trace-arm64.h @@ -0,0 +1,65 @@ +// Copyright 2015, VIXL authors +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// * Neither the name of ARM Limited nor the names of its contributors may be +// used to endorse or promote products derived from this software without +// specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND +// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +// --------------------------------------------------------------------- +// This file is auto generated using tools/generate_simulator_traces.py. +// +// PLEASE DO NOT EDIT. +// --------------------------------------------------------------------- + +#ifndef VIXL_SIM_SHLL2_4S_2OPIMM_TRACE_AARCH64_H_ +#define VIXL_SIM_SHLL2_4S_2OPIMM_TRACE_AARCH64_H_ + +const uint32_t kExpected_NEON_shll2_4S_2OPIMM[] = { + 0xfffd0000, 0xfffe0000, 0xffff0000, 0x00000000, + 0xfffe0000, 0xffff0000, 0x00000000, 0x00010000, + 0xffff0000, 0x00000000, 0x00010000, 0x00020000, + 0x00000000, 0x00010000, 0x00020000, 0x00100000, + 0x00010000, 0x00020000, 0x00100000, 0x007d0000, + 0x00020000, 0x00100000, 0x007d0000, 0x007e0000, + 0x00100000, 0x007d0000, 0x007e0000, 0x007f0000, + 0x007d0000, 0x007e0000, 0x007f0000, 0x33330000, + 0x007e0000, 0x007f0000, 0x33330000, 0x55550000, + 0x007f0000, 0x33330000, 0x55550000, 0x7ffd0000, + 0x33330000, 0x55550000, 0x7ffd0000, 0x7ffe0000, + 0x55550000, 0x7ffd0000, 0x7ffe0000, 0x7fff0000, + 0x7ffd0000, 0x7ffe0000, 0x7fff0000, 0x80000000, + 0x7ffe0000, 0x7fff0000, 0x80000000, 0x80010000, + 0x7fff0000, 0x80000000, 0x80010000, 0xaaaa0000, + 0x80000000, 0x80010000, 0xaaaa0000, 0xcccc0000, + 0x80010000, 0xaaaa0000, 0xcccc0000, 0xff800000, + 0xaaaa0000, 0xcccc0000, 0xff800000, 0xff810000, + 0xcccc0000, 0xff800000, 0xff810000, 0xff820000, + 0xff800000, 0xff810000, 0xff820000, 0xff830000, + 0xff810000, 0xff820000, 0xff830000, 0xfff00000, + 0xff820000, 0xff830000, 0xfff00000, 0xfffd0000, + 0xff830000, 0xfff00000, 0xfffd0000, 0xfffe0000, + 0xfff00000, 0xfffd0000, 0xfffe0000, 0xffff0000, +}; +const unsigned kExpectedCount_NEON_shll2_4S_2OPIMM = 24; + +#endif // VIXL_SIM_SHLL2_4S_2OPIMM_TRACE_AARCH64_H_ |