From 2538168bf2fdd31bae4245584412777bf9d0bf10 Mon Sep 17 00:00:00 2001 From: Ryan Harkin Date: Fri, 20 Jun 2014 15:00:20 +0100 Subject: add board_recovery_image_0.4 Signed-off-by: Ryan Harkin --- SITE1/HBI0262B/board.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 SITE1/HBI0262B/board.txt (limited to 'SITE1/HBI0262B/board.txt') diff --git a/SITE1/HBI0262B/board.txt b/SITE1/HBI0262B/board.txt new file mode 100644 index 0000000..0269b4c --- /dev/null +++ b/SITE1/HBI0262B/board.txt @@ -0,0 +1,17 @@ +BOARD: HBI0262 +TITLE: V2M-Juno DevChip Configuration File + +[SCC REGISTERS] +TOTALSCCS: 7 ;Total Number of SCC registers +SCC: 0x100 0x801F1000 ;A57 PLL Register 0 (800MHz) +SCC: 0x104 0x0000F100 ;A57 PLL Register 1 +SCC: 0x108 0x801B1000 ;A53 PLL Register 0 (700MHz) +SCC: 0x10C 0x0000D100 ;A53 PLL Register 1 +SCC: 0x0F8 0x0BEC0000 ;BL1 entry point + +SCC: 0x00C 0x000000C2 ;Clock Control, TMIF2XCLK, Register 0xC1 = default + ;[3:0] CLKSEL : 0 Output gated, 1 AON_REF_CLK, 2 SYSCLK + ;[7:4] CLKDIV : Clock divider -1 (0 give a division of 1) +SCC: 0x010 0x000000C2 ;Clock Control, TSIF2XCLK, Register 0xC1 = default + ;[3:0] CLKSEL : 0 Output gated, 1 AON_REF_CLK, 2 SYSCLK + ;[7:4] CLKDIV : Clock divider -1 (0 give a division of 1) -- cgit v1.2.3