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+BOARD: HBI0225
+TITLE: V2P-CA5s Configuration File
+
+[DCCS]
+TOTALDCCS: 1 ;Total Number of DCCS
+M0FILE: dbb_v102.ebf ;DCC0 Filename
+M0MODE: MICRO ;DCC0 Programming Mode
+
+[FPGAS]
+TOTALFPGAS: 1 ;Total Number of FPGAs
+F0FILE: ca5_r0p0.bin ;FPGA0 Filename (TestChip image)
+F0MODE: FPGA ;FPGA0 Programming Mode
+
+[TAPS]
+TOTALTAPS: 4 ;Total Number of TAPs
+T0NAME: STM32TMC ;TAP0 Device Name
+T0FILE: NONE ;TAP0 Filename
+T0MODE: NONE ;TAP0 Programming Mode
+T1NAME: STM32CM3 ;TAP1 Device Name
+T1FILE: NONE ;TAP1 Filename
+T1MODE: NONE ;TAP1 Programming Mode
+T2NAME: NX5000_BYPASS ;TAP2 Device Name
+T2FILE: NONE ;TAP2 Filename
+T2MODE: NONE ;TAP2 Programming Mode
+T3NAME: NX5000_FC1152 ;TAP3 Device Name
+T3FILE: NONE ;TAP3 Filename
+T3MODE: NONE ;TAP3 Programming Mode
+
+[OSCCLKS]
+TOTALOSCCLKS: 6 ;Total Number of OSCCLKS
+OSC0: 50.0 ;CPU and AXI (2:1 - 50MHz)
+OSC1: 40.0 ;HSBM (40MHz)
+OSC2: 60.0 ;DDR2 (2:1 - 60MHz)
+OSC3: 23.75 ;HDLCD (23.75MHz)
+OSC4: 80.0 ;TestChip config (80MHz)
+OSC5: 50.0 ;SMB (50MHz)
+
+[SCC REGISTERS]
+TOTALSCCS: 8 ;Total Number of SCC registers
+SCC: 0x000 0x400F0000 ;CFGRW0
+SCC: 0x004 0x40882110 ;CFGRW1
+SCC: 0x010 0x14FC00F4 ;CFGRW2
+SCC: 0x014 0x1CFC18FC ;CFGRW3
+SCC: 0x018 0x10FC0CFC ;CFGRW4
+SCC: 0x01C 0xFF0004FC ;CFGRW5
+SCC: 0x190 0x07220477 ;CFGRW6
+SCC: 0x194 0x00000000 ;CFGRW7