2 files changed, 16 insertions, 8 deletions
diff --git a/ArmPlatformPkg/Sec/SecEntryPoint.S b/ArmPlatformPkg/Sec/SecEntryPoint.S
index 909f7fafb..f8599393c 100644
--- a/ArmPlatformPkg/Sec/SecEntryPoint.S
+++ b/ArmPlatformPkg/Sec/SecEntryPoint.S
@@ -30,6 +30,7 @@ GCC_ASM_EXPORT(_ModuleEntryPoint)
 
 #global functions referenced by this module
 GCC_ASM_IMPORT(CEntryPoint)
+GCC_ASM_IMPORT(ArmPlatformSecBootAction)
 GCC_ASM_IMPORT(ArmPlatformIsMemoryInitialized)
 GCC_ASM_IMPORT(ArmPlatformInitializeBootMemory)
 GCC_ASM_IMPORT(ArmDisableInterrupts)
@@ -46,16 +47,19 @@ StartupAddr:        .word   ASM_PFX(CEntryPoint)
 SecVectorTableAddr: .word		ASM_PFX(SecVectorTable)
 
 ASM_PFX(_ModuleEntryPoint):
- #Set VBAR to the start of the exception vectors in Secure Mode
-  ldr   r0, SecVectorTableAddr
-  bl   ASM_PFX(ArmWriteVBar)
-
   # First ensure all interrupts are disabled
   bl   ASM_PFX(ArmDisableInterrupts)
 
   # Ensure that the MMU and caches are off
   bl  ASM_PFX(ArmDisableCachesAndMmu)
 
+  # Jump to Platform Specific Boot Action function
+  blx   ASM_PFX(ArmPlatformSecBootAction)
+
+  # Set VBAR to the start of the exception vectors in Secure Mode
+  ldr   r0, =SecVectorTable
+  bl    ASM_PFX(ArmWriteVBar)
+
 _IdentifyCpu: 
   # Identify CPU ID
   bl    ASM_PFX(ArmReadMpidr)
diff --git a/ArmPlatformPkg/Sec/SecEntryPoint.asm b/ArmPlatformPkg/Sec/SecEntryPoint.asm
index b291e5062..472abde7f 100644
--- a/ArmPlatformPkg/Sec/SecEntryPoint.asm
+++ b/ArmPlatformPkg/Sec/SecEntryPoint.asm
@@ -20,6 +20,7 @@
   INCLUDE AsmMacroIoLib.inc
   
   IMPORT  CEntryPoint
+  IMPORT  ArmPlatformSecBootAction
   IMPORT  ArmPlatformIsMemoryInitialized
   IMPORT  ArmPlatformInitializeBootMemory
   IMPORT  ArmDisableInterrupts
@@ -39,16 +40,19 @@
 StartupAddr        DCD      CEntryPoint
 
 _ModuleEntryPoint
-  //Set VBAR to the start of the exception vectors in Secure Mode
-  ldr   r0, =SecVectorTable
-  blx   ArmWriteVBar
-
   // First ensure all interrupts are disabled
   blx   ArmDisableInterrupts
 
   // Ensure that the MMU and caches are off
   blx   ArmDisableCachesAndMmu
 
+  // Jump to Platform Specific Boot Action function
+  blx   ArmPlatformSecBootAction
+
+  // Set VBAR to the start of the exception vectors in Secure Mode
+  ldr   r0, =SecVectorTable
+  blx   ArmWriteVBar
+
 _IdentifyCpu 
   // Identify CPU ID
   bl    ArmReadMpidr