ArmPlatformPkg/ArmJunoPkg/AcpiTables: Updated with new ACPI 5.1 Tables & Definitions

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-By: Graeme Gregory <graeme.gregory@linaro.org>

Change-Id: I4cdd9ee135535e73ebc2ae71d7b6210545653477

6 files changed, 184 insertions, 53 deletions

diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf
index 1d108206f..7e59562f2 100644..100755
--- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf
+++ b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf
@@ -46,3 +46,6 @@
   gArmTokenSpaceGuid.PcdArmArchTimerIntrNum

   gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum

   gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum

+

+  gArmJunoTokenSpaceGuid.PcdGenericWatchdogControlBase

+  gArmJunoTokenSpaceGuid.PcdGenericWatchdogRefreshBase

diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl
index 32d066748..932e6cc00 100755
--- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl
+++ b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl
@@ -63,12 +63,24 @@ DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_O
     //

     Device(ETH0) {

       Name(_HID, "ARMH9118")

+      Name(_UID, Zero)

       Name(_CRS, ResourceTemplate() {

               Memory32Fixed(ReadWrite, 0x1A000000, 0x1000)

               Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 192 }

       })

     }

 

+    // UART PL011

+    Device(COM0) {

+      Name(_HID, "ARMH0011")

+      Name(_CID, "PL011")

+      Name(_UID, Zero)

+      Name(_CRS, ResourceTemplate() {

+        Memory32Fixed(ReadWrite, 0x7FF80000, 0x1000)

+        Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 115 }

+      })

+    }

+

     //

     // USB Host Controller

     //

diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Fadt.aslc b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Fadt.aslc
index 6c1070a25..ef6d786b7 100644..100755
--- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Fadt.aslc
+++ b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Fadt.aslc
@@ -17,12 +17,21 @@
 #include <Library/AcpiLib.h>

 #include <IndustryStandard/Acpi.h>

 

+#ifdef ARM_JUNO_ACPI_5_0

 EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {

   ARM_ACPI_HEADER (

     EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,

     EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE,

     EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION

   ),

+#else

+EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {

+  ARM_ACPI_HEADER (

+    EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,

+    EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE,

+    EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION

+  ),

+#endif

   0,                                                                        // UINT32     FirmwareCtrl

   0,                                                                        // UINT32     Dsdt

   EFI_ACPI_RESERVED_BYTE,                                                   // UINT8      Reserved0

@@ -63,7 +72,12 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
   EFI_ACPI_5_0_HW_REDUCED_ACPI | EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE,    // UINT32     Flags

   NULL_GAS,                                                                 // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE  ResetReg

   0,                                                                        // UINT8      ResetValue

+#if ARM_JUNO_ACPI_5_0

   {EFI_ACPI_RESERVED_BYTE,EFI_ACPI_RESERVED_BYTE,EFI_ACPI_RESERVED_BYTE},   // UINT8      Reserved2[3]

+#else

+  EFI_ACPI_5_1_ARM_PSCI_COMPLIANT,                                          // UINT16     ArmBootArchFlags

+  EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION,                 // UINT8      MinorRevision

+#endif

   0,                                                                        // UINT64     XFirmwareCtrl

   0,                                                                        // UINT64     XDsdt

   NULL_GAS,                                                                 // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE  XPm1aEvtBlk

diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Gtdt.aslc b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Gtdt.aslc
index ac74fbcab..97f74820e 100644..100755
--- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Gtdt.aslc
+++ b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Gtdt.aslc
@@ -38,24 +38,63 @@
 

 #define GTDT_GTIMER_FLAGS           (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED)

 

-EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt = {

+#ifdef ARM_JUNO_ACPI_5_0

+  EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt = {

     ARM_ACPI_HEADER(

       EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,

       EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE,

       EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION

     ),

-  SYSTEM_TIMER_BASE_ADDRESS,                    // UINT64  PhysicalAddress

-  GTDT_GLOBAL_FLAGS,                            // UINT32  GlobalFlags

-  FixedPcdGet32 (PcdArmArchTimerSecIntrNum),    // UINT32  SecurePL1TimerGSIV

-  GTDT_GTIMER_FLAGS,                            // UINT32  SecurePL1TimerFlags

-  FixedPcdGet32 (PcdArmArchTimerIntrNum),       // UINT32  NonSecurePL1TimerGSIV

-  GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL1TimerFlags

-  FixedPcdGet32 (PcdArmArchTimerVirtIntrNum),   // UINT32  VirtualTimerGSIV

-  GTDT_GTIMER_FLAGS,                            // UINT32  VirtualTimerFlags

-  FixedPcdGet32 (PcdArmArchTimerHypIntrNum),    // UINT32  NonSecurePL2TimerGSIV

-  GTDT_GTIMER_FLAGS                             // UINT32  NonSecurePL2TimerFlags

-};

+    SYSTEM_TIMER_BASE_ADDRESS,                    // UINT64  PhysicalAddress

+    GTDT_GLOBAL_FLAGS,                            // UINT32  GlobalFlags

+    FixedPcdGet32 (PcdArmArchTimerSecIntrNum),    // UINT32  SecurePL1TimerGSIV

+    GTDT_GTIMER_FLAGS,                            // UINT32  SecurePL1TimerFlags

+    FixedPcdGet32 (PcdArmArchTimerIntrNum),       // UINT32  NonSecurePL1TimerGSIV

+    GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL1TimerFlags

+    FixedPcdGet32 (PcdArmArchTimerVirtIntrNum),   // UINT32  VirtualTimerGSIV

+    GTDT_GTIMER_FLAGS,                            // UINT32  VirtualTimerFlags

+    FixedPcdGet32 (PcdArmArchTimerHypIntrNum),    // UINT32  NonSecurePL2TimerGSIV

+    GTDT_GTIMER_FLAGS                             // UINT32  NonSecurePL2TimerFlags

+  };

+#else

+  #pragma pack (1)

+

+  typedef struct {

+    EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE          Gtdt;

+    EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE     Watchdogs[JUNO_WATCHDOG_COUNT];

+  } EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES;

 

+  #pragma pack ()

+

+  EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {

+    {

+      ARM_ACPI_HEADER(

+        EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,

+        EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE,

+        EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION

+      ),

+      SYSTEM_TIMER_BASE_ADDRESS,                    // UINT64  PhysicalAddress

+      0,                                            // UINT32  Reserved

+      FixedPcdGet32 (PcdArmArchTimerSecIntrNum),    // UINT32  SecurePL1TimerGSIV

+      GTDT_GTIMER_FLAGS,                            // UINT32  SecurePL1TimerFlags

+      FixedPcdGet32 (PcdArmArchTimerIntrNum),       // UINT32  NonSecurePL1TimerGSIV

+      GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL1TimerFlags

+      FixedPcdGet32 (PcdArmArchTimerVirtIntrNum),   // UINT32  VirtualTimerGSIV

+      GTDT_GTIMER_FLAGS,                            // UINT32  VirtualTimerFlags

+      FixedPcdGet32 (PcdArmArchTimerHypIntrNum),    // UINT32  NonSecurePL2TimerGSIV

+      GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL2TimerFlags

+      0xFFFFFFFFFFFFFFFF,                           // UINT64  CntReadBasePhysicalAddress

+      JUNO_WATCHDOG_COUNT,                          // UINT32  PlatformTimerCount

+      sizeof (EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 PlatfromTimerOffset

+    },

+    {

+      EFI_ACPI_5_1_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT(

+          FixedPcdGet32 (PcdGenericWatchdogRefreshBase), FixedPcdGet32 (PcdGenericWatchdogControlBase), 93, 0),

+      EFI_ACPI_5_1_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT(

+          FixedPcdGet32 (PcdGenericWatchdogRefreshBase), FixedPcdGet32 (PcdGenericWatchdogControlBase), 94, EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER)

+    }

+  };

+#endif

 

 VOID*

 ReferenceAcpiTable (

diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Madt.aslc b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Madt.aslc
index a55ca656b..72a35f7d8 100755
--- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Madt.aslc
+++ b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Madt.aslc
@@ -15,53 +15,111 @@
 

 #include "ArmPlatform.h"

 #include <Library/AcpiLib.h>

+#include <Library/ArmLib.h>

 #include <Library/PcdLib.h>

 #include <IndustryStandard/Acpi.h>

 

-#pragma pack (1)

-

-typedef struct {

-  EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;

-  EFI_ACPI_5_0_GIC_STRUCTURE                            GicInterfaces[FixedPcdGet32 (PcdCoreCount)];

-  EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;

-} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE;

-

-#pragma pack ()

-

 //

 // Multiple APIC Description Table

 //

-EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {

-  {

-    ARM_ACPI_HEADER (

-      EFI_ACPI_1_0_APIC_SIGNATURE,

-      EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE,

-      EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION

-    ),

-    //

-    // MADT specific fields

-    //

-    0, // LocalApicAddress

-    0, // Flags

-  },

-  {

-    // Format: EFI_ACPI_5_0_GIC_STRUCTURE_INIT(GicId, AcpiCpuId, Flags, PmuIrq, GicBase)

-    // Note: The GIC Structure of the primary CPU must be the first entry (see note in 5.2.12.14 GIC Structure of

-    //       ACPI v5.0).

-    //       On Juno we can change the primary CPU changing the SCC register. It is not currently supported in the

-    //       Trusted Firmware. When supported, we will need to code to dynamically change the ordering.

-    //       For now we leave CPU2 (A53-0) at the first position.

-    //       The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses

-    //       the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.

-    EFI_ACPI_5_0_GIC_STRUCTURE_INIT(2, 2, EFI_ACPI_5_0_GIC_ENABLED, 50, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-0

-    EFI_ACPI_5_0_GIC_STRUCTURE_INIT(3, 3, EFI_ACPI_5_0_GIC_ENABLED, 54, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-1

-    EFI_ACPI_5_0_GIC_STRUCTURE_INIT(4, 4, EFI_ACPI_5_0_GIC_ENABLED, 58, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-2

-    EFI_ACPI_5_0_GIC_STRUCTURE_INIT(5, 5, EFI_ACPI_5_0_GIC_ENABLED, 62, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-3

-    EFI_ACPI_5_0_GIC_STRUCTURE_INIT(0, 0, EFI_ACPI_5_0_GIC_ENABLED, 34, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A57-0

-    EFI_ACPI_5_0_GIC_STRUCTURE_INIT(1, 1, EFI_ACPI_5_0_GIC_ENABLED, 38, FixedPcdGet32 (PcdGicInterruptInterfaceBase))  // A57-1

-  },

-  EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0)

-};

+#ifdef ARM_JUNO_ACPI_5_0

+  #pragma pack (1)

+

+  typedef struct {

+    EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;

+    EFI_ACPI_5_0_GIC_STRUCTURE                            GicInterfaces[FixedPcdGet32 (PcdCoreCount)];

+    EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;

+  } EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE;

+

+  #pragma pack ()

+

+  EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {

+    {

+      ARM_ACPI_HEADER (

+        EFI_ACPI_1_0_APIC_SIGNATURE,

+        EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE,

+        EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION

+      ),

+      //

+      // MADT specific fields

+      //

+      0, // LocalApicAddress

+      0, // Flags

+    },

+    {

+      // Format: EFI_ACPI_5_0_GIC_STRUCTURE_INIT(GicId, AcpiCpuId, Flags, PmuIrq, GicBase)

+      // Note: The GIC Structure of the primary CPU must be the first entry (see note in 5.2.12.14 GIC Structure of

+      //       ACPI v5.0).

+      //       On Juno we can change the primary CPU changing the SCC register. It is not currently supported in the

+      //       Trusted Firmware. When supported, we will need to code to dynamically change the ordering.

+      //       For now we leave CPU2 (A53-0) at the first position.

+      //       The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses

+      //       the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.

+      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(2, 2, EFI_ACPI_5_0_GIC_ENABLED, 50, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-0

+      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(3, 3, EFI_ACPI_5_0_GIC_ENABLED, 54, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-1

+      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(4, 4, EFI_ACPI_5_0_GIC_ENABLED, 58, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-2

+      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(5, 5, EFI_ACPI_5_0_GIC_ENABLED, 62, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-3

+      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(0, 0, EFI_ACPI_5_0_GIC_ENABLED, 34, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A57-0

+      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(1, 1, EFI_ACPI_5_0_GIC_ENABLED, 38, FixedPcdGet32 (PcdGicInterruptInterfaceBase))  // A57-1

+    },

+    EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0)

+  };

+#else

+  #pragma pack (1)

+

+  typedef struct {

+    EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;

+    EFI_ACPI_5_1_GIC_STRUCTURE                            GicInterfaces[FixedPcdGet32 (PcdCoreCount)];

+    EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;

+  } EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE;

+

+  #pragma pack ()

+

+  EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {

+    {

+      ARM_ACPI_HEADER (

+        EFI_ACPI_1_0_APIC_SIGNATURE,

+        EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE,

+        EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION

+      ),

+      //

+      // MADT specific fields

+      //

+      0, // LocalApicAddress

+      0, // Flags

+    },

+    {

+      // Format: EFI_ACPI_5_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Flags, PmuIrq, GicBase, GicVBase, GicHBase,

+      //                                          GsivId, GicRBase, Mpidr)

+      // Note: The GIC Structure of the primary CPU must be the first entry (see note in 5.2.12.14 GICC Structure of

+      //       ACPI v5.1).

+      //       On Juno we can change the primary CPU changing the SCC register. It is not currently supported in the

+      //       Trusted Firmware. When supported, we will need to code to dynamically change the ordering.

+      //       For now we leave CPU2 (A53-0) at the first position.

+      //       The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses

+      //       the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.

+      EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-0

+          2, 2, GET_MPID(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 50, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+          0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),

+      EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-1

+          3, 3, GET_MPID(1, 1),  EFI_ACPI_5_0_GIC_ENABLED, 54, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+          0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),

+      EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-2

+          4, 4, GET_MPID(1, 2),  EFI_ACPI_5_0_GIC_ENABLED, 58, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+          0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),

+      EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-3

+          5, 5, GET_MPID(1, 3),  EFI_ACPI_5_0_GIC_ENABLED, 62, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+          0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),

+      EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A57-0

+          0, 0, GET_MPID(0, 0),  EFI_ACPI_5_0_GIC_ENABLED, 34, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+          0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),

+      EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A57-1

+          1, 1, GET_MPID(0, 1),  EFI_ACPI_5_0_GIC_ENABLED, 38, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+          0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),

+    },

+    EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0)

+  };

+#endif

 

 VOID*

 ReferenceAcpiTable (

diff --git a/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h b/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h
index 959bfc2fa..badd7a64f 100755
--- a/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h
+++ b/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h
@@ -75,4 +75,9 @@
     EFI_ACPI_ARM_CREATOR_REVISION   /* UINT32  CreatorRevision */ \

   }

 

+#define JUNO_WATCHDOG_COUNT  2

+

+// Define if the exported ACPI Tables are based on ACPI 5.0 spec or latest

+//#define ARM_JUNO_ACPI_5_0

+

 #endif