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-rw-r--r--arch/arm/include/asm/arch_timer.h6
-rw-r--r--arch/arm/kernel/arch_timer.c25
2 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
index 827305d77b3..dc008c696b5 100644
--- a/arch/arm/include/asm/arch_timer.h
+++ b/arch/arm/include/asm/arch_timer.h
@@ -9,11 +9,17 @@ struct arch_timer {
#ifdef CONFIG_ARM_ARCH_TIMER
int arch_timer_register(struct arch_timer *);
+int arch_timer_sched_clock_init(void);
#else
static inline int arch_timer_register(struct arch_timer *at)
{
return -ENXIO;
}
+
+static inline int arch_timer_sched_clock_init(void)
+{
+ return -ENXIO;
+}
#endif
#endif
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c
index bb9a8b45bff..dd907048f57 100644
--- a/arch/arm/kernel/arch_timer.c
+++ b/arch/arm/kernel/arch_timer.c
@@ -23,6 +23,7 @@
#include <asm/localtimer.h>
#include <asm/arch_timer.h>
#include <asm/system_info.h>
+#include <asm/sched_clock.h>
static unsigned long arch_timer_rate;
static int arch_timer_ppi;
@@ -204,6 +205,18 @@ static inline cycle_t arch_counter_get_cntvct(void)
return ((cycle_t) cvalh << 32) | cvall;
}
+static u32 notrace arch_counter_get_cntvct32(void)
+{
+ cycle_t cntvct = arch_counter_get_cntvct();
+
+ /*
+ * The sched_clock infrastructure only knows about counters
+ * with at most 32bits. Forget about the upper 24 bits for the
+ * time being...
+ */
+ return (u32)(cntvct & (u32)~0);
+}
+
static cycle_t arch_counter_read(struct clocksource *cs)
{
return arch_counter_get_cntpct();
@@ -286,3 +299,15 @@ out_free:
return err;
}
+
+int __init arch_timer_sched_clock_init(void)
+{
+ int err;
+
+ err = arch_timer_available();
+ if (err)
+ return err;
+
+ setup_sched_clock(arch_counter_get_cntvct32, 32, arch_timer_rate);
+ return 0;
+}