From 8a40778c7509c15f3251950f42e1ea7162b4ed9c Mon Sep 17 00:00:00 2001 From: Sandrine Bailleux Date: Fri, 23 May 2014 13:03:21 +0100 Subject: Enable Debug and SError exceptions on warm boot path Enable Debug and SError exceptions: - when receiving an SMC; - when a CPU is physically powered up (upon resumption from suspend or in response to a PSCI cpu_on call) Change-Id: I7e5613e34034be6ed68ec9e2aef4de66aa5ac65e --- bl31/aarch64/runtime_exceptions.S | 6 ++++++ services/std_svc/psci/psci_entry.S | 6 ++++++ 2 files changed, 12 insertions(+) diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S index a11cd71..51575a6 100644 --- a/bl31/aarch64/runtime_exceptions.S +++ b/bl31/aarch64/runtime_exceptions.S @@ -44,6 +44,12 @@ * ----------------------------------------------------- */ .macro handle_sync_exception + /* --------------------------------------------- + * Enable Debug and SError interrupts + * --------------------------------------------- + */ + msr daifclr, #(DAIF_ABT_BIT | DAIF_DBG_BIT) + str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] mrs x30, esr_el3 ubfx x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH diff --git a/services/std_svc/psci/psci_entry.S b/services/std_svc/psci/psci_entry.S index bc8d900..3954ab1 100644 --- a/services/std_svc/psci/psci_entry.S +++ b/services/std_svc/psci/psci_entry.S @@ -70,6 +70,12 @@ psci_aff_common_finish_entry: msr vbar_el3, x0 isb + /* --------------------------------------------- + * Enable Debug and SError interrupts + * --------------------------------------------- + */ + msr daifclr, #(DAIF_ABT_BIT | DAIF_DBG_BIT) + /* --------------------------------------------- * Use SP_EL0 for the C runtime stack. * --------------------------------------------- -- cgit v1.2.3