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-rw-r--r--daemon/events-Cortex-A72.xml6
1 files changed, 3 insertions, 3 deletions
diff --git a/daemon/events-Cortex-A72.xml b/daemon/events-Cortex-A72.xml
index 31c9cf3..683d0ae 100644
--- a/daemon/events-Cortex-A72.xml
+++ b/daemon/events-Cortex-A72.xml
@@ -1,6 +1,6 @@
- <counter_set name="ARM_Cortex_A72_cnt" count="6"/>
- <category name="Cortex-A72" counter_set="ARM_Cortex_A72_cnt" per_cpu="yes" supports_event_based_sampling="yes">
- <event counter="ARM_Cortex_A72_ccnt" event="0x11" title="Clock" name="Cycles" display="hertz" units="Hz" average_selection="yes" average_cores="yes" description="The number of core clock cycles"/>
+ <counter_set name="ARMv8_Cortex_A72_cnt" count="6"/>
+ <category name="Cortex-A72" counter_set="ARMv8_Cortex_A72_cnt" per_cpu="yes" supports_event_based_sampling="yes">
+ <event counter="ARMv8_Cortex_A72_ccnt" event="0x11" title="Clock" name="Cycles" display="hertz" units="Hz" average_selection="yes" average_cores="yes" description="The number of core clock cycles"/>
<event event="0x00" title="Software" name="Increment" description="Incremented only on writes to the Software Increment Register"/>
<event event="0x01" title="Cache" name="Instruction refill" description="Instruction fetch that causes a refill of at least the level of instruction or unified cache closest to the processor"/>
<event event="0x02" title="Cache" name="Inst TLB refill" description="Instruction fetch that causes a TLB refill of at least the level of TLB closest to the processor"/>