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/*
* Copyright (c) 2012, ARM Limited. All rights reserved.
*
* Redistribution and use in source and binary forms, with
* or without modification, are permitted provided that the
* following conditions are met:
*
* Redistributions of source code must retain the above
* copyright notice, this list of conditions and the
* following disclaimer.
*
* Redistributions in binary form must reproduce the
* above copyright notice, this list of conditions and
* the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* Neither the name of ARM nor the names of its
* contributors may be used to endorse or promote products
* derived from this software without specific prior written
* permission.
*/
#ifndef VGICLIB_H
#define VGICLIB_H
/*
* The maximum number of virtual interrupts that can be
* migrated in response to a single ICDIPTR access.
*/
#define MAX_MIG_IRQS 4
#include "gic_registers.h"
struct overflowint {
/* This is encoded in the value, but speed optimise by splitting out */
unsigned int priority;
unsigned int value;
struct overflowint *next;
};
struct gic_cpuif {
unsigned int status;
unsigned int activepris; /* Copies of the state from the VGIC itself */
unsigned int elrsr[2]; /* Copies of Empty list register status registers */
unsigned int ints[VGIC_LISTENTRIES];
struct overflowint *overflow; /* List of overflowed interrupts */
unsigned int freelist; /* Bitmask of which list entries are in use */
};
typedef struct irq_info {
unsigned id;
unsigned src_cpuif;
unsigned dest_cpuif;
unsigned desc;
} mig_irq_info;
extern unsigned start_virq_migration(unsigned, unsigned, unsigned);
extern void complete_virq_migration(unsigned);
extern void vgic_init(void);
extern void vgic_savestate(unsigned int cpu);
extern void vgic_loadstate(unsigned int cpu);
extern void vgic_refresh(unsigned int cpu);
extern void enqueue_interrupt(unsigned int descr, unsigned int cpu);
#endif /* VGICLIB_H */
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