diff options
Diffstat (limited to 'big-little/lib/virt_helpers.s')
| -rw-r--r-- | big-little/lib/virt_helpers.s | 174 |
1 files changed, 87 insertions, 87 deletions
diff --git a/big-little/lib/virt_helpers.s b/big-little/lib/virt_helpers.s index eb3c909..ebf4721 100644 --- a/big-little/lib/virt_helpers.s +++ b/big-little/lib/virt_helpers.s @@ -1,57 +1,57 @@ ; ; Copyright (c) 2012, ARM Limited. All rights reserved. - ; + ; ; Redistribution and use in source and binary forms, with ; or without modification, are permitted provided that the ; following conditions are met: - ; + ; ; Redistributions of source code must retain the above - ; copyright notice, this list of conditions and the + ; copyright notice, this list of conditions and the ; following disclaimer. ; ; Redistributions in binary form must reproduce the - ; above copyright notice, this list of conditions and - ; the following disclaimer in the documentation + ; above copyright notice, this list of conditions and + ; the following disclaimer in the documentation ; and/or other materials provided with the distribution. - ; + ; ; Neither the name of ARM nor the names of its ; contributors may be used to endorse or promote products ; derived from this software without specific prior written - ; permission. - ; + ; permission. + ; IMPORT read_actlr IMPORT write_actlr - + EXPORT smc EXPORT dcisw - EXPORT dccsw - EXPORT dccisw - EXPORT read_lr + EXPORT dccsw + EXPORT dccisw + EXPORT read_lr EXPORT read_sp EXPORT write_sp - EXPORT write_lr + EXPORT write_lr EXPORT panic EXPORT spin_lock - EXPORT spin_trylock - EXPORT spin_unlock + EXPORT spin_trylock + EXPORT spin_unlock EXPORT virt_memset EXPORT hyp_save EXPORT num_secondaries EXPORT virt_dead - EXPORT get_sp + EXPORT get_sp EXPORT disable_coherency EXPORT enable_coherency EXPORT inv_tlb_all - EXPORT inv_tlb_mva - EXPORT inv_icache_all + EXPORT inv_tlb_mva + EXPORT inv_icache_all EXPORT inv_bpred_is EXPORT inv_bpred_all EXPORT inv_icache_mva_pou EXPORT inv_dcache_mva_poc EXPORT cln_dcache_mva_pou - EXPORT cln_dcache_mva_poc + EXPORT cln_dcache_mva_poc EXPORT cache_maint_op ; Cache maintenance op types @@ -60,9 +60,9 @@ CLN EQU 0x1 CLN_INV EQU 0x2 AREA |.text|, CODE - + read_lr FUNCTION - ; Save r1 + ; Save r1 push {r1} and r0, r0, #0x1f ; Read the current cpsr @@ -71,18 +71,18 @@ read_lr FUNCTION ; Check if the desired lr is of the current mode cmp r0, r1 moveq r0, LR - beq read_lr_out + beq read_lr_out ; Check if desired lr is of user mode cmp r0, #0x10 mrseq r0, LR_usr beq read_lr_out - ; Check if desired lr is of supervisor mode + ; Check if desired lr is of supervisor mode cmp r0, #0x13 mrseq r0, LR_svc read_lr_out pop {r1} bx lr - ENDFUNC + ENDFUNC write_lr FUNCTION ; Save r2 @@ -94,12 +94,12 @@ write_lr FUNCTION ; Check if the lr is of the current mode cmp r0, r2 moveq LR, r1 - beq write_lr_out + beq write_lr_out ; Check if the lr is of user mode cmp r0, #0x10 msreq LR_usr, r1 beq write_lr_out - ; Check if the lr is of supervisor mode + ; Check if the lr is of supervisor mode cmp r0, #0x13 msreq LR_svc, r1 write_lr_out @@ -108,7 +108,7 @@ write_lr_out ENDFUNC read_sp FUNCTION - ; Save r1 + ; Save r1 push {r1} and r0, r0, #0x1f ; Read the current cpsr @@ -117,30 +117,30 @@ read_sp FUNCTION ; Check if the desired sp is of the current mode cmp r0, r1 moveq r0, SP - beq read_sp_out + beq read_sp_out ; Check if desired sp is of user mode cmp r0, #0x10 mrseq r0, SP_usr beq read_sp_out - ; Check if desired sp is of supervisor mode + ; Check if desired sp is of supervisor mode cmp r0, #0x13 mrseq r0, SP_svc beq read_sp_out - ; Check if desired sp is of irq mode + ; Check if desired sp is of irq mode cmp r0, #0x12 mrseq r0, SP_irq - beq read_sp_out - ; Check if desired sp is of supervisor mode + beq read_sp_out + ; Check if desired sp is of supervisor mode cmp r0, #0x1a mrseq r0, SP_hyp beq read_sp_out - ; Check if desired sp is of monitor mode + ; Check if desired sp is of monitor mode cmp r0, #0x16 - mrseq r0, SP_mon + mrseq r0, SP_mon read_sp_out pop {r1} bx lr - ENDFUNC + ENDFUNC write_sp FUNCTION ; Save r2 @@ -152,32 +152,32 @@ write_sp FUNCTION ; Check if the sp is of the current mode cmp r0, r2 moveq SP, r1 - beq write_sp_out + beq write_sp_out ; Check if the sp is of user mode cmp r0, #0x10 msreq SP_usr, r1 beq write_sp_out - ; Check if the sp is of supervisor mode + ; Check if the sp is of supervisor mode cmp r0, #0x13 msreq SP_svc, r1 beq write_sp_out - ; Check if the sp is of irq mode + ; Check if the sp is of irq mode cmp r0, #0x12 msreq SP_irq, r1 - beq write_sp_out - ; Check if the sp is of hyp mode + beq write_sp_out + ; Check if the sp is of hyp mode cmp r0, #0x1a msreq SP_hyp, r1 beq write_sp_out - ; Check if the sp is of monitor mode + ; Check if the sp is of monitor mode cmp r0, #0x16 - msreq SP_mon, r1 + msreq SP_mon, r1 write_sp_out pop {r2} bx lr - ENDFUNC + ENDFUNC - ALIGN 4 + ALIGN 4 ;-------------------------------------------------------- ; spin_lock @@ -193,7 +193,7 @@ sl_tryloop MCR p15, 0, r0, c7, c10, 4 bx lr ENDFUNC - + ;-------------------------------------------------------- ; spin_lock ;-------------------------------------------------------- @@ -204,10 +204,10 @@ spin_trylock FUNCTION STREXEQ r1, r2, [r0] MOV r0, r1 MCR p15, 0, r0, c7, c10, 4 - bx lr + bx lr ENDFUNC - - ALIGN 4 + + ALIGN 4 ;-------------------------------------------------------- ; spin_unlock @@ -216,36 +216,36 @@ spin_unlock FUNCTION MOV r1, #0 STR r1, [r0] MCR p15, 0, r0, c7, c10, 4 - bx lr + bx lr ENDFUNC - - ALIGN 4 + + ALIGN 4 ;-------------------------------------------------------- ; panic ;-------------------------------------------------------- panic FUNCTION isb - dsb + dsb CPSID aif - B panic + B panic ENDFUNC ;-------------------------------------------------------------- ; Utility function that takes a pointer (r0), stack size (r1). -; It returns the pointer to the stack offset for the asked cpu -;-------------------------------------------------------------- +; It returns the pointer to the stack offset for the asked cpu +;-------------------------------------------------------------- get_sp FUNCTION - ldr r2, =0x2c001800 + ldr r2, =0x2c001800 ldr r2, [r2] - and r2, r2, #0xff + and r2, r2, #0xff clz r2, r2 mov r3, #32 sub r2, r3, r2 mul r2, r2, r1 add r0, r0, r2 bx lr - ENDFUNC + ENDFUNC disable_coherency FUNCTION push {lr} @@ -257,7 +257,7 @@ disable_coherency FUNCTION pop {lr} bx lr ENDFUNC - + enable_coherency FUNCTION push {lr} bl read_actlr @@ -266,19 +266,19 @@ enable_coherency FUNCTION dsb isb pop {lr} - bx lr + bx lr ENDFUNC inv_bpred_is FUNCTION mcr p15, 0, r0, c7, c1, 6 bx lr ENDFUNC - + inv_bpred_all FUNCTION mcr p15, 0, r0, c7, c5, 6 bx lr ENDFUNC - + inv_tlb_all FUNCTION mcr p15, 0, r0, c8, c7, 0 dsb @@ -288,53 +288,53 @@ inv_tlb_all FUNCTION inv_tlb_mva FUNCTION mcr p15, 0, r0, c8, c7, 1 - dsb + dsb isb bx lr ENDFUNC - + inv_icache_all FUNCTION mcr p15, 0, r10, c7, c5, 0 ; invalidate I cache dsb isb bx lr ENDFUNC - + inv_icache_mva_pou FUNCTION mcr p15, 0, r0, c7, c5, 1 dsb isb bx lr ENDFUNC - + cln_dcache_mva_pou FUNCTION mcr p15, 0, r0, c7, c11, 1 dsb isb bx lr ENDFUNC - + cln_dcache_mva_poc FUNCTION mcr p15, 0, r0, c7, c10, 1 dsb isb - bx lr + bx lr ENDFUNC inv_dcache_mva_poc FUNCTION mcr p15, 0, r0, c7, c6, 1 dsb isb - bx lr - ENDFUNC - + bx lr + ENDFUNC + ; Clean/Invalidate/Clean and invalidate a specified cache level. ; Ignore if the level does not exist. cache_maint_op FUNCTION push {r4-r11} dsb lsl r10, r0, #1 ; start clean at specified cache level - mrc p15, 1, r0, c0, c0, 1 ; read clidr + mrc p15, 1, r0, c0, c0, 1 ; read clidr 10 add r2, r10, r10, lsr #1 ; work out 3x current cache level mov r3, r0, lsr r2 ; extract cache type bits from clidr @@ -353,12 +353,12 @@ cache_maint_op FUNCTION ands r7, r7, r3, lsr #13 ; extract max number of the index size 20 mov r9, r4 ; create working copy of max way size -30 +30 orr r11, r10, r9, lsl r5 ; factor way and cache number into r11 - lsl r6, r9, r5 + lsl r6, r9, r5 orr r11, r10, r6 ; factor way and cache number into r11 orr r11, r11, r7, lsl r2 ; factor index number into r11 - lsl r6, r7, r2 + lsl r6, r7, r2 orr r11, r11, r6 ; factor index number into r11 cmp r1, #INV mcreq p15, 0, r11, c7, c6, 2 ; invalidate by set/way @@ -368,7 +368,7 @@ cache_maint_op FUNCTION beq %f40 mcr p15, 0, r11, c7, c14, 2 ; clean & invalidate by set/way ; nop ; nop -40 +40 subs r9, r9, #1 ; decrement the way bge %b30 subs r7, r7, #1 ; decrement the index @@ -378,20 +378,20 @@ cache_maint_op FUNCTION mcr p15, 2, r10, c0, c0, 0 ; select current cache level in cssr dsb isb - pop {r4-r11} + pop {r4-r11} bx lr - ENDFUNC + ENDFUNC smc FUNCTION push {r4-r12, lr} smc #0 pop {r4-r12, pc} ENDFUNC - + hyp_save FUNCTION hvc #2 bx lr - ENDFUNC + ENDFUNC virt_memcpy FUNCTION cmp r2, #0 @@ -415,7 +415,7 @@ virt_memset FUNCTION virt_dead FUNCTION b virt_dead ENDFUNC - + num_secondaries FUNCTION mrc p15, 1, r0, c9, c0, 2 lsr r0, r0, #24 @@ -426,17 +426,17 @@ num_secondaries FUNCTION dcisw FUNCTION mcr p15, 0, r0, c7, c6, 2 bx lr - ENDFUNC + ENDFUNC dccsw FUNCTION mcr p15, 0, r0, c7, c10, 2 bx lr - ENDFUNC - + ENDFUNC + dccisw FUNCTION mcr p15, 0, r0, c7, c14, 2 bx lr - ENDFUNC - - + ENDFUNC + + END |