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authorSandrine Bailleux <sandrine.bailleux@arm.com>2014-06-02 13:52:38 +0100
committerSandrine Bailleux <sandrine.bailleux@arm.com>2014-06-05 17:39:40 +0100
commitc6af727f3c974f7f656003aed6a9ac8d483b46c8 (patch)
tree30a1f0d24720bfc25ad494154fc5b0275915778b
parentde116940dd0a4b7f503a58452e278a14b00fdde9 (diff)
downloadarm-trusted-firmware-c6af727f3c974f7f656003aed6a9ac8d483b46c8.tar.gz
PL011: Fix a bug in the UART FIFO polling
Before attempting to write a character, the PL011 driver polls the PL011_UARTFR_TXFF bit to know whether the UART FIFO is full. However, the comparison with 1 was incorrect because PL011_UARTFR_TXFF is not at bit 0. This patch fixes it. Change-Id: I4b53c28612f58581c6189ed6c794ed02cc2a89e3
-rw-r--r--drivers/arm/pl011/pl011_console.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/arm/pl011/pl011_console.c b/drivers/arm/pl011/pl011_console.c
index 0e82aa2..a26c00e 100644
--- a/drivers/arm/pl011/pl011_console.c
+++ b/drivers/arm/pl011/pl011_console.c
@@ -65,8 +65,10 @@ void console_init(unsigned long base_addr)
}
-#define WAIT_UNTIL_UART_FREE(base) while ((pl011_read_fr(base)\
- & PL011_UARTFR_TXFF) == 1)
+#define WAIT_UNTIL_UART_FREE(base) \
+ while ((pl011_read_fr(base) & PL011_UARTFR_TXFF)) \
+ continue
+
int console_putc(int c)
{
assert(uart_base);