diff options
author | Jon Medhurst <tixy@linaro.org> | 2014-01-23 13:42:23 +0000 |
---|---|---|
committer | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2014-03-12 16:03:32 +0000 |
commit | 1100a4f14029f91210ea5c14333b530ac59702ce (patch) | |
tree | 0db766f7a38cb377f51651aff233610315847797 | |
parent | f5a885ff155ff40957e7341a69218ce1baa9a1f1 (diff) |
juno: Update GIC addresses
Signed-off-by: Jon Medhurst <tixy@linaro.org>
-rw-r--r-- | plat/juno/plat_gic.c | 13 | ||||
-rw-r--r-- | plat/juno/platform.h | 20 |
2 files changed, 10 insertions, 23 deletions
diff --git a/plat/juno/plat_gic.c b/plat/juno/plat_gic.c index 8929172..32d3e96 100644 --- a/plat/juno/plat_gic.c +++ b/plat/juno/plat_gic.c @@ -59,7 +59,7 @@ void gicv3_cpuif_setup(void) * GICR_WAKER is NOT banked per CPU, compute the correct base address * per CPU. */ - base = gicv3_get_rdist(BASE_GICR_BASE, read_mpidr()); + base = gicv3_get_rdist(GICR_BASE, read_mpidr()); if (base == (uintptr_t)NULL) { /* No re-distributor base address. This interface cannot be * configured. @@ -123,7 +123,7 @@ void gicv3_cpuif_deactivate(void) * GICR_WAKER is NOT banked per CPU, compute the correct base address * per CPU. */ - base = gicv3_get_rdist(BASE_GICR_BASE, read_mpidr()); + base = gicv3_get_rdist(GICR_BASE, read_mpidr()); if (base == (uintptr_t)NULL) { /* No re-distributor base address. This interface cannot be * configured. @@ -272,11 +272,6 @@ void gic_distif_setup(unsigned int gicd_base) void gic_setup(void) { - unsigned int gicd_base, gicc_base; - - gicd_base = platform_get_cfgvar(CONFIG_GICD_ADDR); - gicc_base = platform_get_cfgvar(CONFIG_GICC_ADDR); - - gic_cpuif_setup(gicc_base); - gic_distif_setup(gicd_base); + gic_cpuif_setup(GICC_BASE); + gic_distif_setup(GICD_BASE); } diff --git a/plat/juno/platform.h b/plat/juno/platform.h index 5506866..465f5be 100644 --- a/plat/juno/platform.h +++ b/plat/juno/platform.h @@ -171,20 +171,12 @@ /******************************************************************************* * GIC-400 & interrupt handling related constants ******************************************************************************/ -/* VE compatible GIC memory map */ -#define VE_GICD_BASE 0x2c001000 -#define VE_GICC_BASE 0x2c002000 -#define VE_GICH_BASE 0x2c004000 -#define VE_GICV_BASE 0x2c006000 - -/* Base FVP compatible GIC memory map */ -#define BASE_GICD_BASE 0x2f000000 -#define BASE_GICR_BASE 0x2f100000 -#define BASE_GICC_BASE 0x2c000000 -#define BASE_GICH_BASE 0x2c010000 -#define BASE_GICV_BASE 0x2c02f000 - -#define IRQ_TZ_WDOG 56 +#define GICD_BASE 0x2c010000 +#define GICC_BASE 0x2c02f000 +#define GICH_BASE 0x2c04f000 +#define GICV_BASE 0x2c06f000 + +#define IRQ_TZ_WDOG 86 #define IRQ_SEC_PHY_TIMER 29 #define IRQ_SEC_SGI_0 8 #define IRQ_SEC_SGI_1 9 |