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| author | Dan Handley <dan.handley@arm.com> | 2015-03-23 18:13:33 +0000 |
|---|---|---|
| committer | Dan Handley <dan.handley@arm.com> | 2015-04-27 18:05:06 +0100 |
| commit | 1b70db06ff8dcd34c4d6ad5a3499f602318d376d (patch) | |
| tree | 96fe88cef925e6d0cc612d92aadb188449b3ae76 | |
| parent | 71a844453735d93c389969f6b781673654936029 (diff) | |
Fix type mismatches in verbose logging
Commit dad2504 adds support for type checking in printf-like
functions. Some of the VERBOSE logging statements were not updated
at that time.
Fix the type mismatches in the verbose logging statements.
Change-Id: Idd9a49e41cc0dc31f7698e220819d934e3d2d10e
| -rw-r--r-- | bl32/tsp/tsp_interrupt.c | 14 | ||||
| -rw-r--r-- | common/bl_common.c | 4 |
2 files changed, 9 insertions, 9 deletions
diff --git a/bl32/tsp/tsp_interrupt.c b/bl32/tsp/tsp_interrupt.c index 7163bad..9abe9ba 100644 --- a/bl32/tsp/tsp_interrupt.c +++ b/bl32/tsp/tsp_interrupt.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -58,9 +58,9 @@ void tsp_update_sync_fiq_stats(uint32_t type, uint64_t elr_el3) #if LOG_LEVEL >= LOG_LEVEL_VERBOSE spin_lock(&console_lock); - VERBOSE("TSP: cpu 0x%x sync fiq request from 0x%llx\n", + VERBOSE("TSP: cpu 0x%lx sync fiq request from 0x%lx\n", mpidr, elr_el3); - VERBOSE("TSP: cpu 0x%x: %d sync fiq requests, %d sync fiq returns\n", + VERBOSE("TSP: cpu 0x%lx: %d sync fiq requests, %d sync fiq returns\n", mpidr, tsp_stats[linear_id].sync_fiq_count, tsp_stats[linear_id].sync_fiq_ret_count); @@ -104,9 +104,9 @@ int32_t tsp_fiq_handler(void) tsp_stats[linear_id].fiq_count++; #if LOG_LEVEL >= LOG_LEVEL_VERBOSE spin_lock(&console_lock); - VERBOSE("TSP: cpu 0x%x handled fiq %d\n", + VERBOSE("TSP: cpu 0x%lx handled fiq %d\n", mpidr, id); - VERBOSE("TSP: cpu 0x%x: %d fiq requests\n", + VERBOSE("TSP: cpu 0x%lx: %d fiq requests\n", mpidr, tsp_stats[linear_id].fiq_count); spin_unlock(&console_lock); #endif @@ -121,8 +121,8 @@ int32_t tsp_irq_received(void) tsp_stats[linear_id].irq_count++; #if LOG_LEVEL >= LOG_LEVEL_VERBOSE spin_lock(&console_lock); - VERBOSE("TSP: cpu 0x%x received irq\n", mpidr); - VERBOSE("TSP: cpu 0x%x: %d irq requests\n", + VERBOSE("TSP: cpu 0x%lx received irq\n", mpidr); + VERBOSE("TSP: cpu 0x%lx: %d irq requests\n", mpidr, tsp_stats[linear_id].irq_count); spin_unlock(&console_lock); #endif diff --git a/common/bl_common.c b/common/bl_common.c index 8c241ec..b9cc0f2 100644 --- a/common/bl_common.c +++ b/common/bl_common.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -137,7 +137,7 @@ void reserve_mem(uint64_t *free_base, size_t *free_size, if (pos == BOTTOM) *free_base = addr + size; - VERBOSE("Reserved %u bytes (discarded %u bytes %s)\n", + VERBOSE("Reserved 0x%lx bytes (discarded 0x%lx bytes %s)\n", reserved_size, discard_size, pos == TOP ? "above" : "below"); } |